Introduction:

The different circuit values used are the ones which is used in Exercise 3 – FET DC Biasing, for easier understanding since the DC values are computed and simulated hence the student have at least a small foundation on the circuit. The added instruments are function generator, oscilloscope and bode plotter. The function generator is easier to used compared to AC supply since it will already generate a peak value thus serving as an AC supply for the circuits. Oscilloscope is used to observe the output waveforms of the circuit. For this case, to verify if the output is 180 degrees out of phase to input( since it is a common emitter configuration). The bode plotter is used for the preparation for the oscillator exercise, and to find out the cut-off frequency of the circuit. An additional AC voltmeter is also used to measure the AC output voltage.

    It should be noted that the EWB spec sheet does not provide any inputs for the IDSS, the student have to figure it out how the software express the max drain current. It is then concluded through further reading that the transconductance coefficient (BETA) in the EWB spec sheet is used to express the IDSS current. Contrary to the instructors’ discussion, the transconductance coefficient in the software must be changed in order to specify the FET’s IDSS current. By further computation for the theoretical gm, it is found out that it can then be solved, using the known parameters.

Complete Circuit Model:

AC Circuit Model:

Input and output impedance(Zi and Zo):

                                  Zi = R_G                                                                    Zo = R_D

Voltage Gain(Av):

                                                                           g_m =  DI_D/DV_GS = dI_D/dV_GS             , where: I_D = I_DSS( 1 – V_GS/V_P )²

:

:

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

                                                            A_V = -g_m(r_d//R_D)

                     , since rd>10RD

                                                            A_V = -g_mR_D

Simulated Circuit:

Input and output impedance(Zi and Zo):

                                  Zi = R_G                                                                    Zo = R_D

                                  Zi = 1MΩ                                                                 Zo = 3.07kΩ

Voltage Gain(Av):

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

From DC Biasing of the FET,

                         I_DSS = 8ma                                 V_GS = -1V           

                                            Vp = -3.5V

Note:

                      ..I_DSS is expressed in EWB as conductance coefficient (b):

                                                                              b =  I_DSS

                                                                                    |V_P|²                      ,this is the value given in the FET characterisitics

                                                             g_m = { 2(8mA)/|-3.5|} {1 – (-1/-3.5)}²

                                                             g_m = 3.27mS

                                                            A_V = -(3.27mS)(3.07kΩ)

                                                            A_V = -10.02  è 20.02dB

Voltage Output:

                                                            Av = -Vo/Vi

                                                            Vo = -AvVi

                                                            Vo = -10.02*(10mV/10^1/2 )

                                                             Vo = 70.71mV  

Note: the 10mv is not used since it in peak value, while the voltage measured by the voltmeter are in terms of Vrms.

The computed output closely matched to its simulated output. Only the measure output voltage does not have a negative sign, this may be because this is in AC, by simple means of understanding, AC have no polarities since they have positive and negative values and thus this software assumed it is in such.

Input and Output Capacitor:

Input Capacitor:                                                                         Output Capacitor:

Ci = 1/fRi                                                                                    Co = 1/fRo

Ci = 1/(10kHz*1MΩ)                                                                   Co = 1/(10kHz*3.07kΩ)

Ci = 100pF                                                                                  Co = 32.57nF

Phase Analysis:

The input and output capacitors are important in determining the proper phase of the output. For this case, the computed value of the capacitor is correct since the output of the circuit is 180 degrees out of phase to its input. It is so since common emitter configurations have a 180 degrees out of phase to its input.

Legend: Ouput

              Input 

The boxes above are the measurements of the output and input waveforms. The input box which is the blue box waveform, shows the maximum and minimum voltages which is 9.9396mV and -9.9396mV. It also shows the input frequency which is 10Khz (1/dx), this frequency is generated by the function generator.

       The ouput box which is the red waveform, shows the minimum and maximum voltages which are –96.5431mV and 107.6381mV. It also shows the output frequency which is 10Khz (1/dx), this frequency is generated by the function generator.                         

       We can observed the peak values of the waveforms are not equal, this may due to some inconsistencies, but at least in our computation we should assume a fixed value. Also, we should also be reminded no matter how basic this is that the oscilloscope measures the peak value of voltages while voltmeters measures the rms voltages which will be used later.

Frequency Response:

       The bode plotter is used to determine the frequency response of the circuit with respect to its gain in decibels.

The box shows the cutoff frequency x1 which is 2.3714kHz which already has a gain of 18.4060 db (y1). The ideal gain of the circuit is 20.0165 dB (y2) which is the response of the circuit at 40kHz. Since this circuit allows high frequency to pass, this is called as a high pass filter.

Av(db) = 20log(Vo/Vi)

Av(db) = 20log(10.02)

Av(db) = 20.02dB , the gain of the circuit at 10kHz…

AC Circuit Model:

Input and output impedance(Zi and Zo):

                                  Zi = R_G                                                                    Zo = R_D

Voltage Gain(Av):

                                                                           g_m =  DI_D/DV_GS = dI_D/dV_GS             , where: I_D = I_DSS( 1 – V_GS/V_P )²

:

:

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

                                                            A_V = -g_m(r_d//R_D)

                                                                                                             , since rd>10RD

                                                            A_V = -g_mR_D

Simulated Circuit:

Input and output impedance(Zi and Zo):

                                  Zi = R_G                                                                    Zo = R_D

                                  Zi = 1MΩ                                                                 Zo = 3.817kΩ

Voltage Gain(Av):

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

From DC Biasing of the FET,

                         I_DSS = 8ma                                 V_GS = -1V           

                                            Vp = -3.5V

Note:

                      ..I_DSS is expressed in EWB as conductance coefficient (b):

                                                                              b =  I_DSS

                                                                                    |V_P|²                      ,this is the value given in the FET characterisitics

                                                             g_m = { 2(8mA)/|-3.5|} {1 – (-1/-3.5)}²

                                                             g_m = 3.27mS

                                                            A_V = -(3.27mS)(2.817kΩ)

                                                            A_V = -9.21  è 19.29dB

Voltage Output:

                                                            Av = -Vo/Vi

                                                            Vo = -AvVi

                                                            Vo = -9.21*(10mV/10^1/2 )

                                                             Vo = 65.12mV  

Note: the 10mv is not used since it in peak value, while the voltage measured by the voltmeter are in terms of Vrms.

The computed output closely matched to its simulated output. Only the measure output voltage does not have a negative sign, this may be because this is in AC, by simple means of understanding, AC have no polarities since they have positive and negative values and thus this software assumed it is in such.

It is important to find out that the computed and simulated output vary for about 3mv. This is because at 10kHz, the circuit is at cutoff. The operating frequency of the circuit is about 25kHz ( way above the intented limits of the design frequency, 3kHz – 20kHz), which will be later shown at the bode plotter. Adjusting the function generator to this frequency, output voltage will then be to 65.12mV which is the intended gain. If we were to follow the exact design, then we must redesign the circuit starting from DC biasing.

Input and Output Capacitor:

Input Capacitor:                                                                         Output Capacitor:

Ci = 1/fRi                                                                                    Co = 1/fRo

Ci = 1/(10kHz*1MΩ)                                                                   Co = 1/(10kHz*2.820kΩ)

Ci = 100pF                                                                                  Co = 35.5nF

Phase Analysis:

The input and output capacitors are important in determining the proper phase of the output. For this case, the computed value of the capacitor is correct since the output of the circuit is 180 degrees out of phase to its input. It is so since common emitter configurations have a 180 degrees out of phase to its input.

Legend: Ouput

              Input 

The boxes above are the measurements of the output and input waveforms. The input box which is the blue box waveform, shows the maximum and minimum voltages which is 9.9396mV and -9.9396mV. It also shows the input frequency which is 10Khz (1/dx), this frequency is generated by the function generator.

       The ouput box which is the red waveform, shows the minimum and maximum voltages which are –92.3284mV and 96.0344mV. It also shows the output frequency which is 10Khz (1/dx), this frequency is generated by the function generator.                         

       We can observed the peak values of the waveforms are not equal, this may due to some inconsistencies, but at least in our computation we should assume a fixed value. Also, we should also be reminded no matter how basic this is that the oscilloscope measures the peak value of voltages while voltmeters measures the rms voltages which will be used later.

Frequency Response:

       The bode plotter is used to determine the frequency response of the circuit with respect to its gain in decibels.

The box shows the cutoff frequency x1 which is 2.3714kHz which already has a gain of 18.4060 db (y1). The ideal gain of the circuit is 20.0165 dB (y2) which is the response of the circuit at 40kHz. Since this circuit allows high frequency to pass, this is called as a high pass filter.

Av(db) = 20log(Vo/Vi)

Av(db) = 20log(9.21)

Av(db) = 19.29dB , the gain of the circuit at 10kHz…

The bode plotter shows that at 10Khz the circuit is at tip of the cut-off frequency. Its gain does differ which will then be 19.1286, but its computed should be 19.30 which does then occurs at roughly 30 kHz. This explains why the output voltage does not reflect the computed output.
 

Complete Circuit Model:

AC Circuit Model:

Input and output impedance(Zi and Zo):

                                  Zi = R₁//R₂                                                                    Zo = R_D

Voltage Gain(Av):

                                                                           g_m =  DI_D/DV_GS = dI_D/dV_GS             , where: I_D = I_DSS( 1 – V_GS/V_P )²

:

:

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

                                                            A_V = -g_m(r_d//R_D)

                                                                                                             , since rd>10RD

                                                            A_V = -g_mR_D

Simulated Circuit:

Input and output impedance(Zi and Zo):

                                  Zi = R₁//R₂                                                              Zo = R_D

                                  Zi = 2.4MΩ//100kΩ                                                Zo = 2.573kΩ

                                  Zi = 96kΩ                                                

Voltage Gain(Av):

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

From DC Biasing of the FET,

                         I_DSS = 8ma                                 V_GS = -1V           

                                            Vp = -3.5V

Note:

                      ..I_DSS is expressed in EWB as conductance coefficient (b):

                                                                              b =  I_DSS

                                                                                    |V_P|²                      ,this is the value given in the FET characterisitics

                                                             g_m = { 2(8mA)/|-3.5|} {1 – (-1/-3.5)}²

                                                             g_m = 3.27mS

                                                            A_V = -(3.27mS)(2.573kΩ)

                                                            A_V = -8.4  è 18.49dB

Voltage Output:

                                                            Av = -Vo/Vi

                                                            Vo = -AvVi

                                                            Vo = -8.4*(10mV/10^1/2 )

                                                             Vo = 59.49mV  

Note: the 10mv is not used since it in peak value, while the voltage measured by the voltmeter are in terms of Vrms.

The computed output closely matched to its simulated output. Only the measure output voltage does not have a negative sign, this may be because this is in AC, by simple means of understanding, AC have no polarities since they have positive and negative values and thus this software assumed it is in such.

It is important to find out that the computed and simulated output vary for about 1mv. This is because at 10kHz, the circuit is at the tipof  cutoff. The operating frequency of the circuit is about 25kHz ( way above the intented limits of the design frequency, 3kHz – 20kHz), which will be later shown at the bode plotter. Adjusting the function generator to this frequency, output voltage will then be to 65.12mV which is the intended gain. If we were to follow the exact design, then we must redesign the circuit starting from DC biasing.

Input and Output Capacitor:

Input Capacitor:                                                                         Output Capacitor:

Ci = 1/fRi                                                                                    Co = 1/fRo

Ci = 1/(10kHz*96kΩ)                                                                  Co = 1/(10kHz*2.573kΩ)

Ci = 1nF                                                                                      Co = 38.87nF

Phase Analysis:

The input and output capacitors are important in determining the proper phase of the output. For this case, the computed value of the capacitor is correct since the output of the circuit is 180 degrees out of phase to its input. It is so since common emitter configurations have a 180 degrees out of phase to its input.

Legend: Ouput

              Input 

The boxes above are the measurements of the output and input waveforms. The input box which is the blue box waveform, shows the maximum and minimum voltages which is 9.9542mV and -10.0988mV. It also shows the input frequency which is 10Khz (1/dx), this frequency is generated by the function generator.

       The ouput box which is the red waveform, shows the minimum and maximum voltages which are –82.8376mV and 118.0055mV. It also shows the output frequency which is 10Khz (1/dx), this frequency is generated by the function generator.                          

       We can observed the peak values of the waveforms are not equal, this may due to some inconsistencies, but at least in our computation we should assume a fixed value. Also, we should also be reminded no matter how basic this is that the oscilloscope measures the peak value of voltages while voltmeters measures the rms voltages which will be used later.

Frequency Response:

The bode plotter is used to determine the frequency response of the circuit with respect to its gain in decibels.

The box shows the cutoff frequency x1 which is 2.3714kHz which already has a gain of 18.4060 db (y1). The ideal gain of the circuit is 20.0165 dB (y2) which is the response of the circuit at 40kHz. Since this circuit allows high frequency to pass, this is called as a high pass filter.

Av(db) = 20log(Vo/Vi)

Av(db) = 20log(8.4)

Av(db) = 18.49dB , the ideal  gain of the circuit

The bode plotter shows that at 10Khz the circuit is at tip of the cut-off frequency. Its gain does differ which will then be 19.6240, but its computed should be 18.4685 which does then occurs at roughly 30 kHz. This explains why the output voltage does not reflect the computed output.
 

Complete Circuit Model:

AC Circuit Model:

Input and output impedance(Zi and Zo):

                                  Zi = (R_F + R_D) / (1 + g_mR_D )                                            Zo = R_G//R_D

Voltage Gain(Av):

                                                                           g_m =  DI_D/DV_GS = dI_D/dV_GS             , where: I_D = I_DSS( 1 – V_GS/V_P )²

:

:

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

                                                            A_V = -(1/R_F – g_m) / (1/r_dR_D + 1/R_F)

                 , since rd>10RD

                                                            A_V =  -(1/R_F – g_m) / (1/R_D + 1/R_F)

Simulated Circuit:

Input and output impedance(Zi and Zo):

                                  Zi = (R_F + R_D) / (1 + g_mR_D )                                               Zo = R_G//R_D

                                  Zi = (750KΩ + 448.53) / (1 + 3.46mS*448.53Ω )               Zo = 750kΩ//448.53Ω

                                  Zi = 294.07kΩ                                                                    Zo = 448.26Ω

Voltage Gain(Av):

                                                            g_m = 2I_DSS/|VP| (1 – V_gs/V_p)²

From DC Biasing of the FET,

                        I_DSS = 4ma                                 V_GS = 1.8V           

                                            Vp = -3.5V

Note:

                      ..I_DSS is expressed in EWB as conductance coefficient (b):

                                                                              b =  I_{DSS /} |V_P|²                      ,this is the value given in the FET characterisitics

                                                             g_m = { 2(4mA)/|-3.5|} {1 – (1.8/-3.5)}²

                                                             g_m = 3.46mS

                                                             A_V =  -(1/750kΩ – 3.46mS) / (1/448.53Ω + 1/750kΩ)

                                                             A_V  = -1.55

Voltage Output:

                                                            Av = -Vo/Vi

                                                            Vo = -AvVi

                                                            Vo = 1.55*(10mV/10^1/2 )

                                                            Vo = 10.96mV  

Note: the 10mv is not used since it in peak value, while the voltage measured by the voltmeter are in terms of Vrms.

The computed output closely matched to its simulated output. Only the measure output voltage does not have a negative sign, this may be because this is in AC, by simple means of understanding, AC have no polarities since they have positive and negative values and thus this software assumed it is in such.

It is important to find out that the computed and simulated output vary for about 1mv. This is because at 10kHz, the circuit is at the tipof  cutoff. The operating frequency of the circuit is about 25kHz ( way above the intented limits of the design frequency, 3kHz – 20kHz), which will be later shown at the bode plotter. Adjusting the function generator to this frequency, output voltage will then be to 65.12mV which is the intended gain. If we were to follow the exact design, then we must redesign the circuit starting from DC biasing.

Input and Output Capacitor:

Input Capacitor:                                                                         Output Capacitor:

Ci = 1/fRi                                                                                    Co = 1/fRo

Ci = 1/(10kHz*294.07kΩ)                                                            Co = 1/(10kHz*2.573kΩ)

Ci = 340pF                                                                                   Co = 223.07nF

Phase Analysis:

The input and output capacitors are important in determining the proper phase of the output. For this case, the computed value of the capacitor is correct since the output of the circuit is 180 degrees out of phase to its input. It is so since common emitter configurations have a 180 degrees out of phase to its input.

The boxes above are the measurements of the output and input waveforms. The input box which is the blue box waveform, shows the maximum and minimum voltages which is -10.0988 and 9.9542mV. It also shows the input frequency which is 10Khz (1/dx), this frequency is generated by the function generator.

       The ouput box which is the red waveform, shows the minimum and maximum voltages which are –82.8376mV and 118.0055mV. It also shows the output frequency which is 10Khz (1/dx), this frequency is generated by the function generator.                         

       We can observed the peak values of the waveforms are not equal, this may due to some inconsistencies, but at least in our computation we should assume a fixed value. Also, we should also be reminded no matter how basic this is that the oscilloscope measures the peak value of voltages while voltmeters measures the rms voltages which will be used later.

Frequency Response:

The bode plotter is used to determine the frequency response of the circuit with respect to its gain in decibels.

The box shows the cutoff frequency x1 which is 2.3714kHz which already has a gain of 18.4060 db (y1). The ideal gain of the circuit is 20.0165 dB (y2) which is the response of the circuit at 40kHz. Since this circuit allows high frequency to pass, this is called as a high pass filter.

Av(db) = 20log(Vo/Vi)

Av(db) = 20log(8.4)

Av(db) = 18.49dB , the ideal  gain of the circuit

The bode plotter shows that at 10Khz the circuit is at tip of the cut-off frequency. Its gain does differ which will then be 19.6240, but its computed should be 18.4685 which does then occurs at roughly 30 kHz. This explains why the output voltage does not reflect the computed output.
 

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